FLT_ENA=Val_0x0, I2S=Val_0x0, PDM=Val_0x0, SPI=Val_0x0, UART=Val_0x0
DMA2 Select Register
| UART | Select DMA for LPUART 0 (Val_0x0): Select DMA2 1 (Val_0x1): Select DMA0 |
| SPI | Select DMA for LPSPI 0 (Val_0x0): Select DMA2 1 (Val_0x1): Select DMA0 group 1 2 (Val_0x2): Select DMA0 group 2 3 (Val_0x3): Select DMA0 group 2 |
| I2S | Select DMA for LPI2S 0 (Val_0x0): Select DMA2 1 (Val_0x1): Select DMA0 |
| PDM | Select DMA for LPPDM 0 (Val_0x0): Select DMA2 1 (Val_0x1): Select DMA0 |
| FLT_ENA | For each bit: 0 (Val_0x0): Disable glitch-filter for LPGPIO input 1 (Val_0x1): Enable glitch-filter for LPGPIO input |